FETT507-C Core Board Pin Function Modification Guidelines

The FETT507-C core board CPU is a quad-core Cortex-A53, 1.5GHz main frequency, the GPU is G31 MP2, and the core board integrates 2GB DDR3 RAM, 8GB eMMC ROM for smooth operation of Android, Ubuntu, Linux operating systems. High performance, more than 50% performance improvement compared to the CPU-like FETA40i-C core board.



Forlinx embedded FET507-C core board since its introduction, its new users are growing, but for friends who have just come into contact with FETT507-C core board, unfamiliar with kernel content, may be more time-consuming and laborious to develop. If you want to develop your own base plate, you need to modify the pin function configuration to suit the interface function of your own base plate.



Today, the small editor first to modify the UART2 pin function, to take you together to understand the entire process of pin modification.



Pin function multiplex idea:

1. Confirm which pins are required for the new features, and confirm what functions these pins were originally used for

2, Remove the original function of the use of these pins (turn off the function or replace the pins)

3, Add new features and use these pins

Here the selection of PG15, PG16, that is, the original I2C4 function used on the pin. The first step is completed here, confirming the pin and pin default features to be used.



Second, remove the original function of the use of these pins

Open the source code and first look at the device tree file for the T507:



OKT507-linux-sdk/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/OKT507-C-Common.dtsi

Feature configuration device tree 2



OKT507-linux-sdk/kernel/linux- 4.9/arch/arm64/boot/dts/sunxi/sun50iw9p1.dtsi

Feature configuration device tree 1



OKT507-linux-sdk/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw9p1-clk.dtsi

Clock device tree



OKT507-linux-sdk/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw9p1-pinctrl.dtsi

Pin multiplex device tree



open sun50iw9p1-pinctrl.dtsi and search TWI4 to find the default pin configuration. You can see that the PG15 and PG16 we are going to use have been used



find the TWI4 feature configuration, on the 807 lines of sun50iw9p1.dtsi, you can see the call to the pin configuration twi4_pins_a and twi4_pins_b



on line 352 of OKT507-C-Common.dtsi, you can see here that twi4 is mounted with a touch chip, where we turn off TWI4 and modify the TWI4 status to status="disabled";



At this point, we turned off the use of TWI4 pairs of pins PG15 and PG16, while TWI4 could not be used and the touch chip could not be recognized.



Third, add serial port and use PG15, PG16 pins



First open sun50iw9p1-pinctrl.dtsi, search UART2, find the default pin of UART2, default PH5, PH6, PH7, PH8





We made changes to the pins and configuration to PG15, PG16 two pins, modified to figure



Open sun50iw9p1.dtsi to find the feature configuration of UART2.



You can see that the uart2_type is set to 4, that is, four-wire serial port, changed to 2, as a second-line serial port.

Then we open UART2 and modify the UART2 status to status " "okay";

At this point we have configured the UART2 pin and turned on the function of UART2.

Of course, the board has UART0, UART1, and UART5 turned on by default, so the driver is configured by default. You only need to compile and package the source code to get a mirror image of UART2 added.



Here is a paragraph of the article, you see whether FET507-C core board pin function modification has a preliminary understanding, I hope this can provide some help for your development process.

Although the source content is different from different platforms, the idea of modifying is the same: What are the required pins? What was the original function of the pin? What are the features to be done? First understand the purpose, and then have a simple understanding of the source structure. This allows you to easily modify independently.