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Recent content by FvM

  1. FvM

    Lightning melts ground wires

    Are we talking about direct lightning strike to the antenna? If antenna and receiver have no ground connection at all, lightning will jump over from receiver to metal parts or water. It's also creating additional risk to persons. Big vessels have lightning proof antennas on earthed pylons and...
  2. FvM

    1 mosfet square wave driver doubles 24 V at output

    Controller output U will be limited to actuator control range, surely not -1000 to 1000. Also integrator shouldn't be allowed to ramp up or down beyond control value limits. Ideal anti-windup logic would freeze integrator when it tries to pull control value beyond the limits and frees it when...
  3. FvM

    0-10V analog isolator design

    Ripple is a problem, but can be overcome with respective filters. The biggest problem is ramp nonlinearity. The same reason why dual-slope converters don't achieve sufficient linearity beyond 4.5 digits.
  4. FvM

    0-10V analog isolator design

    Post #1 says accuracy 0.03 % FSR. Without additional specs, this must be read as total error (INL + offset + gain error) over used temperature range. 5 Hz BW has been added later on. State-of-the-art "isolation amplifiers" (actually implemented as AD-isolator-DA chain) are achieving this...
  5. FvM

    UART and receving more than it is expected.

    I agree with KlausST, show the complete code. 1. Presume the buffer is cleared at program start. If you see zero characters in buffer, they might have been there before. 2. What's the return code of HAL_UART_Receive()? 3. What's the value of huart2.RxXferCount after return from...
  6. FvM

    SOT223 with 1.1W dissipation and gap pad to its plastic case top?

    I believe that you don't like the datasheet spec, but for me it sounds correct (in line with simple thermal resistance estimations of molding material), as already stated above.
  7. FvM

    Thermocouple good at room temp is good always?

    So you also have sufficient cold junction compensation, presumed you are using correct TC connectors.
  8. FvM

    SOT223 with 1.1W dissipation and gap pad to its plastic case top?

    The datasheet looks trustworthy. Not without taking other parameters into consideration. Because Rth,ja is mainly describing convection heatsinking, but you are looking for conductive heatsinking through top interface. Reliable values can be either obtained by FEM methods or direct measurement.
  9. FvM

    How increase contrast of LCD Volcraft DPS 4005

    Most reflective LCD displays that I know are specified with "6 O'clock viewing direction".
  10. FvM

    Can we stack gap pads?

    2 W/mk is at the lower edge of available gap pad conductivity. A 5x5x5 mm cube would e.g. have a thermal resistance of 100 K/W see an example what's available on the market https://amecthermasol.co.uk/product/?cat=thermally-conductive-materials&family=thermal-pads-
  11. FvM

    Thermal resistance through plastic case top?

    Rth difference between T0-220 and TO-220FP is about 2.5 K/W, that's the thermal resistance of thin insulation layer between internal metal tab and bottom surface. KlausST already discussed the details.
  12. FvM

    strategy for designing a locking component in PLL

    There's obviously an unwanted modulation. Presentation of results suggests that you are not familiar with systematic debugging of this kind of problems. Test setup isn't shown clear enough to see all possible causes. Generally you should consider: - unstable oscillator power supply - faulty...
  13. FvM

    Why won't EDA Playground show all eight times I set my clock to zero?

    The testbench is o.k., there's however a trivial fault in sQueue causing stuck of the for loop var elem must be integer elem # time: 4, reset: 0, shift: 0, insertee: 8, extractee: 0. # time: 8, reset: 0, shift: 1, insertee: 10, extractee: 0. # time: 12, reset: 0, shift: 0, insertee...
  14. FvM

    Insertion loss budget on PCB - PCIe Gen 3

    Sure, X1/X2/X4/X8/X16 is supported number of lanes. The table is obviously showing total PCIe data throughput in GByte/s for different number of lanes.
  15. FvM

    Having a problem with less pk to pk clock

    Please clarify how the LVDS output is loaded and how you are measuring? Specification is pretty clear. Either your operation conditions are wrong or the device is defective.

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