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Recent content by newbie_hs

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    SAR ADC Input Types Pseudo Differential ADC

    May I know will GND bounce errors happen in Analog measurements
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    SAR ADC Input Types Pseudo Differential ADC

    I was going through this document, which describes different SAR ADC input types.The below image is taken from the same document. I have couple of questions regarding this configuration. Can I ground IN+ and connect the input to IN-.Any special care is required for this Why this...
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    Why Virtual Short Concept in an Op-Amp is only applicable to negative feedback

    Dear Team, I have a question which is haunting me for a long time.Till now I did not get any proper explanation. If you can explain with mathematical proof it is appreciated. The virtual short concept is only applied to op-amps in negative feedback configuration, and not in case of positive...
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    Layout review DS90UB960-Q1 interface with SC206E

    Please see my stackk-up below L1 : Signal Layer Deserializer is present here. L2 : GND L3 : VCC+GND L4 : VCC L5: GND L6: Signal layer SC206E is present in this layer 1703067405 Differential pairs are moving from L1 to L6.Solid GND planes are present below differential pairs only on L2 and L5
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    Considering PCB trace as a transmission line

    I found an explanation here. Which explains what will happen to reflections when Rt>2Tpd and Rt<2Tpd.
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    Layout review DS90UB960-Q1 interface with SC206E

    In the image I put only L1 and L6. In L1 and L6 AUX_GND is poured in all unused areas
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    Layout review DS90UB960-Q1 interface with SC206E

    My Deserializer is present in L1 and L2 is complete GND plane SC206E is present on L6 and L5 is complete GND plane. L3 is VCC+ GND and L4 is VCC
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    Considering PCB trace as a transmission line

    Dear Team, According to this link,we can consider a PCB trace as transmission line when, I have see this explanation many places.But no one explains how transmission line effects comes when rise time is smaller than 2*times propagation delay and how transmission line effect disappears when...
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    Layout review DS90UB960-Q1 interface with SC206E

    Dear Team, This is a continuation of this question. In my board DS90UB960 is placed in top and SC206E is placed in bottom. Please see the below image Below is the enlarged version of CSI0 interface. The yellow color signals are clock and red color are CSI0 t0 3 data line. These signals are...
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    eMMC interface SDIO2 of EC200U

    Dear Team, I am interfacing eMMC(THGBMJG6C1LBAU7) memory with EC200U from Quectel. The Quectel E200U has two SDIO ports.I used SDIO2 for connecting my eMMC memory. In the hardware design document they have shown WLAN interface with SDIO2.Please see the image below. Does that mean SDIO2...
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    DS90UB960-Q1 Length matching issue

    My RX and TX are on same PCB For RX UFL connectors are used. Cameras will be connected to this RX connector. SERDES cameras are used. These cameras are sitting in the back of our electric bike
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    DS90UB960-Q1 Length matching issue

    This is very informative. I think TI have some confusion in this. Below is the guidance they provided in the reference design. Here it is 10mils and in datasheet it is 5mils. 1702358970 I tried to back calculate how you arrived 75mils.Please let me know it is fine or not. FR4 propagation speed...
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    DS90UB960-Q1 Length matching issue

    Dear Team, We are using DS90UB960-Q1 n our design. The layout guideline(Page no 178) says ". Minimize intra-pair and inter-pair length mismatch within a single CSI-2 TX Port (recommended <= 5 mils)." Our layout team is not able to achieve this. The best they can achieve is 250mils. May I...
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    DDR Termination resistor placement clarification

    Can I put parallel termination at the beginning of the string
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    DDR Termination resistor placement clarification

    Why last device,why not first device

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